SAN JOSE, Calif. -- October 1, 2013 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today received three TSMC Partner of the Year Awards during ...

Cadence Design Systems announced on December 1 that HiSilicon Technologies has signed an agreement to significantly expand its use of the Cadence digital and custom/analog flows for 16nm FinFET ...

SAN JOSE, Calif -- Apr 8, 2013 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced an ongoing multi-year agreement with TSMC to develop the design infrastructure for 16-nanometer FinFET ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ:CDNS) today announced its continued collaboration with TSMC to certify its design solutions for TSMC 5nm and 7nm+ FinFET process ...

Companies to enable easy node-to-node migration for analog blocks with enhanced PDK across multiple FinFET processes to accelerate design closure Early customers seeing more than 2.5X design cycle ...

Cadence Design Systems, Inc CDNS unveiled UltraLink D2D PHY (physical interfaces) IP for Taiwan Semiconductor Manufacturing Company’s TSM 7 nanometer (nm) FinFET (Fin Field Effect Transistor) process ...

Cadence Design Systems has announced that its digital and custom/analog tools have achieved certification from TSMC for its most-current version of 10nm FinFET Design Rule Manual (DRM) and SPICE ...

The next frontier in the electronics industry is the FinFET, a new type of multi-gate 3D transistor that offers tremendous power and performance advantages compared to traditional, planar transistors.

Cadence Design Systems has announced its continued collaboration with TSMC to certify its design solutions for TSMC 5nm and 7nm+ FinFET process technologies for mobile and high-performance computing ...