Intel has confirmed that it’s working on a discrete graphics solution for “client PCs,” which will arrive in 2020. That, however, is far from all Intel is working on. The company laid out its ...

At an Architecture Day event hosted this week, Intel articulated an unusually lucid strategy for its development of future processors, most of which will revolve around fragmenting the various ...

Intel has revealed more details on its upcoming 3D Foveros packaging technology, which it will be using to built its next-gen Meteor Lake, Arrow Lake, and Lunar Lake CPUs of the future. The company ...

Intel has announced its first 'Lakefield' hybrid CPUs to make use of its Foveros 3D chip stacking technology. The Core i5-15G7 and Core i3-13G4 are 7W 'Sunny Cove' parts that use a 10nm manufacturing ...

A lot of you might be aware of Moore’s Law, which states that the number of transistors on a chipset increases every two years while the footprint of the chipset reduces. And as per the current trend ...

"Hot Chips" sounds like a nice side dish, but is in fact a technological symposium held yearly in Silicon Valley. It's a place for processor vendors to talk about their latest innovations, and while ...

During Intel's Architecture Day briefing they teased a new interconnect technology, which aims to replace EMIB as their go to for linking and even stacking devices on a package. Intel has made great ...

Add Yahoo as a preferred source to see more of our stories on Google. Intel Foveros isn’t the name of a new chip, but rather a technology that will allow the chipmaker to bundle various vertical chip ...

I had the chance to spend a few days with Intel executives at its recent industry analyst summit held at the company’s Santa Clara headquarters, and it was a real eye-opener as it laid out its new ...

Intel held an Architecture Day in Los Altos yesterday, where it disclosed a number of details regarding next-generation CPU and GPU architectures and manufacturing process technologies. In addition to ...

Intel has a new 3D technology to allow for 3D chip stacking, despite previous problems with this type of capability. Share on Facebook (opens in a new window) Share on X (opens in a new window) Share ...