Two test strategies are used to test virtually all IC logic—automatic test pattern generation (ATPG) with test pattern compression, and logic built-in self-test (BIST). For many years, there was a ...

Traditional IC pattern-generation methods focus on detectingdefects at gate terminals or at interconnects. Unfortunately, a significantpopulation of defects may occur within an IC's gates, or cells.

I pretty much knew that the reaction to my last blog analyzing the flawed logic of the AOL-Time Warner merger would elicit comments blasting me for using 20-20 hindsight. However, being right was not ...

Two companies have joined forces to optimize quality, integrity, post-programming validation, and cost for embedded test of reprogrammable logic cores. The increasing complexity of system-on-a-chip ...