Electronic Design

Using An SPI Interface To Improve FPGA Routing

Using SPI interface to free FPGA routing resources is allowing over 90% utilization, fast timing closure and supports modular design approach without consequences. When doing designs with FPGA you are ...
Semiconductor Engineering

Power Sub-Mesh Construction To Mitigate IR Drop And Minimize Routing Overhead (Intel)

A new technical paper titled “Power Sub-Mesh Construction in Multiple Power Domain Design with IR Drop and Routability Optimization” was published by researchers at Intel Corporation and National ...
EDN

How to achieve fast timing closure on FPGA designs

Technological advances in FPGA devices have created both application opportunities and, at the same time, tough design challenges for developers. In new devices, for example, logic routing rather than ...
Embedded

FPGA Clock Schemes

One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.
TechRepublic

Experimental Study of Network Based Novel Adaptive Routing Algorithm for Wireless Ad-hoc Network

Ad hoc network is a collection of mobile nodes which dynamically form a temporary network without any infrastructure or centralize entity. There are number of routing protocol exists in ad hoc network ...